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1 for more information www.linear.com/ltm8063 typical application features applications description 40v in , 2a silent switcher module regulator the lt m ? 8063 is a 40v in , 2a continuous, 2.5a peak, step- down module ? (power module) regulator. included in the package are the switching controller, power switches, inductor, and all support components. operating over an input voltage range of 3.2v to 40v, the ltm8063 supports an output voltage range of 0.8v to 15v and a switching frequency range of 200khz to 2.2mhz , each set by a single resistor. only the input and output filter capacitors are needed to finish the design. the low profile package enables utilization of unused space on the bottom of pc boards for high density point of load regulation. the ltm8063 is packaged in a thermally en - hanced, compact over-molded ball grid array (bga) package suitable for automated assembly by standard sur face mount equipment. the ltm8063 is rohs compliant. all registered trademarks and trademarks are the property of their respective owners. efficiency vs load current 5v out from 6.5v in to 40v in step-down converter n low noise silent switcher ? architecture n wide input voltage range: 3.2v to 40v n wide output voltage range: 0.8v to 15v n 2a continuous output current at 12v in , 5v out , t a ?=?85c n 2.5a peak current n selectable switching frequency: 200khz to 2.2mhz n external synchronization n configurable as an inverter n 6.25mm 4mm 2.22mm bga package n automotive battery regulation n power for portable products n distributed supply regulation n industrial supplies n wall transformer regulation 3 8063 6 0 8063 0a lt m8063 8063fa 2 2.5 55 65 75 85 95 efficiency (%) 8063 ta01b 12v in 24v in 36v in load current (a) 0 0.5 1 1.5
2 for more information www.linear.com/ltm8063 pin configuration absolute maximum ratings v in , run, pg voltage .............................................. 42 v v out voltage ........................................................... 19 v fb, tr/ss voltage ..................................................... 4v sync voltage ............................................................ 6v maximum internal temperature .......................... 125 c storage temperature ............................ C 55 c to 125 c peak reflow solder body temperature ............... 26 0 c (notes 1, 2) 3 3 8 6 t jmax = 125c, ja = 36.5c/w, jcbottom = 10.4c/w jctop = 37.1c/w, jb = 10.8c/w, weight = 0.14g values determined per jedec51-9, 51-12 order information http://www.linear.com/product/ltm8063#orderinfo part number terminal finish part marking* package type msl rating temperature range device finish code ltm8063ey#pbf sac305 (rohs) 8063 v bga 3 C40c to 125c ltm8063iy#pbf ? consult marketing for parts specified with wider operating temperature ranges. *device temperature grade is indicated by a label on the shipping container. pad or ball finish code is per ipc/jedec j-std-609. ? terminal finish part marking: www.linear.com/leadfree ? recommended bga pcb assembly and manufacturing procedures: www .linear.com/umodule/pcbassembly ? bga package and tray drawings: www.linear.com/packaging lt m8063 8063fa
3 for more information www.linear.com/ltm8063 electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: unless otherwise noted, the absolute minimum voltage is zero. note 3: the ltm8063e is guaranteed to meet performance specifications from 0c to 125c internal. specifications over the full C40c to 125c internal operating temperature range are assured by design, characterization and correlation with statistical process controls. the ltm8063i is guaranteed to meet specifications over the full C40c to 125c internal operating temperature range. note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. parameter conditions min typ max units minimum input voltage v in rising l 3.2 v output dc voltage r fb open r fb = 13.7k, v in = 40v 0.8 15 v v peak output dc current v out = 3.3v, f sw ?=?1mhz 2.5 a quiescent current into v in run = 0v no load, sync = 0v, not switching 3 8 a a line regulation 5.5v < v in < 36v, i out = 1a 0.5 % load regulation 0.1a < i out < 2a 0.5 % output voltage ripple i out = 2a 15 mv switching frequency r t = 232k, v in = 8v r t = 41.2k r t = 15.8k 200 1 2.2 khz mhz mhz voltage at fb l 760 774 786 mv run threshold voltage 0.9 1.2 v run current 1 a tr/ss current tr/ss = 0v 2 a tr/ss pull down tr/ss = 0.1v 300 pg threshold voltage at fb (upper) fb falling (note 5) 0.84 v pg threshold voltage at fb (lower) fb rising (note 5) 0.7 v pg leakage current pg = 42v 1 a pg sink current pg = 0.1v 150 a sync threshold voltage synchronization 0.4 1.5 v sync voltage to enable spread spectrum 2.9 4.2 v sync current sync = 2v 5 a the l denotes the specifications which apply over the specified operating temperature range, otherwise specifications are at t j = 25c. v in ?=?12v, run = 2v, unless otherwise noted. note 4: the ltm8063 contains overtemperature protection that is intended to protect the device during momentary overload conditions. the internal temperature exceeds the maximum operating junction temperature when the overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may impair device reliability. note 5: pg transitions from low to high. lt m8063 8063fa
4 for more information www.linear.com/ltm8063 typical performance characteristics efficiency, v out ?=?1v efficiency, v out ?=?1.2v efficiency, v out ?=?1.5v t a = 25c, unless otherwise noted. efficiency, v out ?=?1.8v efficiency, v out ?=?2v efficiency, v out ?=?2.5v efficiency, v out ?=?3.3v efficiency, v out ?=?5v efficiency, v out ?=?8v lt m8063 8063fa 2 80 90 efficiency (%) 8063 g06 12v in 24v in 36v in load current (a) 0 0.5 2.5 1 1.5 2 2.5 50 60 70 80 90 efficiency (%) 40 8063 g07 12v in 24v in 36v in load current (a) 0 0.5 1 1.5 2 50 2.5 55 65 75 85 95 efficiency (%) 8063 g08 12v in 24v in 60 36v in load current (a) 0 0.5 1 1.5 2 2.5 55 65 70 75 85 95 efficiency (%) 8063 g09 80 efficiency (%) 8063 g01 12v in 12v in 24v in 36v in load current (a) 0 0.5 1 1.5 2 2.5 40 24v in 50 60 70 80 efficiency (%) 8063 g02 12v in 24v in 36v in load current (a) 36v in 0 0.5 1 1.5 2 2.5 45 55 65 75 load current (a) 85 efficiency (%) 8063 g03 12v in 24v in 36v in load current (a) 0 0.5 1 0 1.5 2 2.5 45 55 65 75 85 efficiency (%) 8063 g04 0.5 12v in 24v in 36v in load current (a) 0 0.5 1 1.5 2 2.5 1 45 55 65 75 85 efficiency (%) 8063 g05 12v in 24v in 36v in 1.5 load current (a) 0 0.5 1 1.5 2 2.5 50 60 70
5 for more information www.linear.com/ltm8063 typical performance characteristics t a = 25c, unless otherwise noted. efficiency, v out ?=?12v efficiency, v out ?=?15v efficiency, v out ?=?C3.3v efficiency, v out ?=?C5v efficiency, v out ?=?C8v efficiency, v out ?=?C12v efficiency, v out ?=?C15v input vs load current, v out ?=?1v input vs load current, v out ?=?1.2v lt m8063 8063fa 2.5 80 efficiency (%) 8063 g16 12v in 24v in 36v in load current (a) 0 0.5 1 55 1.5 2 2.5 0 0.1 0.2 0.3 0.4 input current (a) 8063 g17 65 12v in 24v in 36v in load current (a) 0 0.5 1 1.5 2 2.5 75 0 0.1 0.2 0.3 0.4 input current (a) 8063 g18 85 95 efficiency (%) 8063 g10 24v in 36v in 24v in load current (a) 0 0.5 1 1.5 2 55 65 75 85 36v in 95 efficiency (%) 8063 g11 12v in 24v in 36v in load current (a) 0 0.5 1 load current (a) 1.5 2 2.5 50 60 70 80 efficiency (%) 8063 g12 12v in 0 24v in load current (a) 0 0.5 1 1.5 2 50 60 70 0.5 80 efficiency (%) 8063 g13 12v in 24v in load current (a) 0 0.5 1 1.5 1 50 60 70 80 efficiency (%) 8063 g14 12v in 24v in load current (a) 0 1.5 0.25 0.50 0.75 1 50 60 70 80 efficiency (%) 8063 g15 2 12v in 24v in load current (a) 0 0.25 0.50 0.75 50 60 70
6 for more information www.linear.com/ltm8063 typical performance characteristics input vs load current v out ?=?1.5v input vs load current v out ?=?1.8v input vs load current v out ?=?2v input vs load current v out ?=?3.3v input vs load current v out ?=?5v input vs load current v out ?=?8v input vs load current v out ?=?12v input vs load current v out ?=?15v input vs load current v out ?=?C3.3v t a = 25c, unless otherwise noted. lt m8063 8063fa 2 24v in 36v in load current (a) 0 0.5 1 1.5 2 2.5 0 2.5 0.5 1.0 1.5 input current (a) 8063 g25 24v in 36v in load current (a) 0 0.5 0 1 1.5 2 0 0.5 1.0 1.5 input current (a) 8063 g26 12v in 0.2 24v in 36v in load current (a) 0 0.5 1 1.5 2 2.5 0 0.4 0.25 0.50 0.75 1.00 input current (a) 8063 g27 0.6 input current (a) 8063 g19 12v in 24v in 12v in 36v in load current (a) 0 0.5 1 1.5 2 2.5 0 0.2 24v in 0.4 0.6 input current (a) 8063 g20 12v in 24v in 36v in load current (a) 0 0.5 36v in 1 1.5 2 2.5 0 0.2 0.4 0.6 input current (a) 8063 g21 load current (a) 12v in 24v in 36v in load current (a) 0 0.5 1 1.5 2 2.5 0 0 0.25 0.50 0.75 1.00 input current (a) 8063 g22 12v in 24v in 36v in 0.5 load current (a) 0 0.5 1 1.5 2 2.5 0 0.4 0.8 1 1.2 input current (a) 8063 g23 12v in 24v in 36v in load current (a) 0 0.5 1 1.5 1.5 2 2.5 0 0.5 1.0 1.5 2.0 input current (a) 8063 g24
7 for more information www.linear.com/ltm8063 typical performance characteristics t a = 25c, unless otherwise noted. input vs load current v out ?=?C5v input vs load current v out ?=?C8v input vs load current v out ?=?C12v input vs load current v out ?=?C15v maximum load current vs v in maximum load current vs v in input current vs v in v out ?short circuited derating, v out = 1v, dc2494a demo board derating, v out = 1.2v, dc2494a demo board lt m8063 8063fa 0 0 25 50 75 100 125 0 1 2 3 0.40 maximum load current (a) 8063 g35 0lfm ambient temperature (c) 12v in 24v in 36v in 0 25 50 0.80 75 100 125 0 1 2 3 maximum load current (a) 8063 g36 0lfm 1.20 ambient temperature (c) input current (a) 8063 g28 12v in 24v in load current (a) 0 12v in 0.5 1 1.5 0 0.50 1.00 1.50 input current (a) 8063 g29 12v in 24v in 24v in load current (a) 0 0.25 0.50 0.75 0 0.40 0.80 1.20 load current (a) input current (a) 8063 g31 ?3.3v out ?5v out ?8v out input voltage (v) 0 10 20 30 0 40 0 1 2 3 maximum load current (a) 8063 g32 ?12v out ?15v out input voltage (v) 0.5 0 10 20 30 0 0.25 0.50 0.75 1.00 maximum load current (a) 1 8063 g33 v in (v) 0 10 20 30 40 0 300 600 1.5 900 input current (ma) 8063 g34 12v in 24v in load current (a) 0 0.25 0.50 0.75 2 1 0 0.5 1.0 1.5 input current (a) 8063 g30 12v in 24v in 36v in
8 for more information www.linear.com/ltm8063 derating, v out = 1.5v, dc2494a demo board derating, v out = 2v, dc2494a demo board derating, v out = 1.8v, dc2494a demo board typical performance characteristics derating, v out = 2.5v, dc2494a demo board derating, v out = 3.3v, dc2494a demo board derating, v out = 3.3v, dc2494a demo board derating, v out = 5v, dc2494a demo board t a = 25c, unless otherwise noted. derating, v out = 5v, dc2494a demo board derating, v out = 8v, dc2494a demo board 12v in 24v in 36v in 12v in 24v in 36v in 12v in 24v in 36v in 12v in 24v in 36v in 12v in 24v in 36v in 12v in 24v in 36v in lt m8063 8063fa 125 100 125 0 1 2 3 maximum load current (a) ambient temperature (c) 8063 g43 0 lfm f sw = 2mhz 0 0 25 50 75 100 125 0 1 2 3 1 maximum load current (a) ambient temperature (c) 8063 g44 0 lfm ambient temperature (c) 0 25 50 75 100 2 125 0 1 2 3 maximum load current (a) 8063 g45 3 maximum load current (a) 8063 g37 0lfm ambient temperature (c) 12v in 12v in 24v in 36v in 0 25 50 75 100 125 0 1 24v in 2 3 maximum load current (a) 8063 g38 0lfm ambient temperature (c) 12v in 24v in 36v in 0 36v in 25 50 75 100 125 0 1 2 3 maximum load current (a) 0 8063 g39 0lfm ambient temperature (c) 0 lfm 0 25 50 75 100 125 25 0 1 2 3 maximum load current (a) 8063 g40 ambient temperature (c) 0 lfm 0 25 50 50 75 100 125 0 1 2 3 maximum load current (a) 8063 g41 75 ambient temperature (c) 0 25 50 75 100 125 0 1 2 100 3 maximum load current (a) 8063 g42 ambient temperature (c) 0 lfm f sw = 2mhz 0 lfm 0 25 50 75
9 for more information www.linear.com/ltm8063 typical performance characteristics t a = 25c, unless otherwise noted. derating, v out = 12v, dc2494a demo board derating, v out = 15v, dc2494a demo board derating, v out = C3.3v, dc2494a demo board derating, v out = C5v, dc2494a demo board derating, v out = C8v, dc2494a demo board derating, v out = C12v, dc2494a demo board dropout voltage vs load current v out ?=?5v derating, v out = C15v, dc2494a demo board cispr22 class b emissions dc2494a demo board, v out = 5v, c9 ?=? 0.1f , no emi filter, 1a load 12v in 24v in 24v in 36v in 24v in 36v in 12v in 24v in 36v in 12v in 24v in 12v in 24v in 12v in 24v in lt m8063 8063fa 0.1 0 0.5 1.0 1.5 maximum load current (a) 8063 g50 0 lfm c) 0 25 0.2 50 75 100 125 0 0.1 0.2 0.3 0.4 0.5 0.3 maximum load current (a) ambient temperature (c) 8063 g52 horizontal vertical frequency (mhz) 0 200 400 600 0.4 800 1000 ?5 5 15 25 35 45 55 amplitude (dbuv/m) 0.5 8063 g53 maximum load current (a) ambient temperature (c) 8063 g51 load current (a) 0 0 lfm 0.5 1 1.5 2 2.5 0 200 400 600 800 0 dropout voltage (mv) 8063 g54 0 lfm 0 25 50 75 100 125 0 25 0.5 1.0 1.5 maximum load current (a) ambient temperature (c) 8063 g46 0 lfm c) 0 25 50 50 75 100 125 0 0.5 1.0 1.5 maximum load current (a) 8063 g47 75 ambient temperature (c) 0 lfm 0 25 50 75 100 125 0 0.5 100 1.0 1.5 2.0 maximum load current (a) ambient temperature (c) 8063 g48 0 lfm 0 25 50 125 75 100 125 0 0.5 1.0 1.5 2.0 maximum load current (a) 8063 g49 0 ambient temperature (c) 0 lfm c) ambient temperature (c) 0 25 50 75 100 125
10 for more information www.linear.com/ltm8063 pin functions gnd (bank 1, a1, a4 ): tie these gnd pins to a local ground plane below the ltm8063 and the circuit components. in most applications, the bulk of the heat flow out of the ltm8063 is through these pads, so the printed circuit design has a large impact on the thermal performance of the part. see the pcb layout and thermal considerations sections for more details. v in (bank 2): v in supplies current to the ltm8063s in- ternal regulator and to the internal power switches. these pins must be locally bypassed with an external, low esr capacitor ; see t able 1 for recommended values. v out (bank 3): power output pins. apply the output filter capacitor and the output load between these pins and gnd pins. run (pin b3): pull the run pin below 0.9v to shut down the ltm8063 . tie to 1.2v or more for normal operation. if the shutdown feature is not used, tie this pin to the v in pin. rt (pin c1): the rt pin is used to program the switching frequency of the ltm8063 by connecting a resistor from this pin to ground. the applications information section of the data sheet includes a table to determine the resistance value based on the desired switching frequency. minimize capacitance at this pin. do not drive this pin. sync (pin b2 ): external clock synchronization input and operational mode. this pin programs four different operating modes: 1. burst mode ? operation. tie this pin to ground for burst mode operation at low output loadsthis will result in ultralow quiescent current. 2. pulse-skipping mode. float this pin for pulse-skipping mode. this mode offers full frequency operation down to low output loads before pulse skipping occurs. 3. spread spectrum mode. tie this pin high (between 2.9v and 4.2v) for pulse-skipping mode with spread spectrum modulation. 4. synchronization mode. drive this pin with a clock source to synchronize to an external frequency. during synchro - nization the part will operate in pulse-skipping mode. pg (pin b1): the pg pin is the open-collector output of an internal comparator. pg remains low until the fb pin voltage is within about 10% of the final regulation volt - age. the pg signal is valid when v in is above 3.2v. if v in is above 3.2v and run is low, pg will drive low. if this function is not used, leave this pin floating. fb (pin a2): the ltm8063 regulates its fb pin to 0.77v. connect the adjust resistor from this pin to ground. the value of r fb is given by the equation r fb = 192.73/ (v out ?C?0.774), where r fb is in k. tr/ss (pin a3): the tr/ss pin is used to provide a soft- start or tracking function. the internal 2a pull-up current in combination with an external capacitor tied to this pin creates a voltage ramp. if tr/ss is less than about 0.77v, the fb voltage tracks to this value. the soft-start ramp time is approximated by the equation t = 0.39 ? c where c is in?f. for tracking, tie a resistor divider to this pin from the tracked output. this pin is pulled to ground with an internal mosfet during shutdown and fault conditions ; use a series resistor if driving from a low impedance output. this pin may be left floating if the tracking function is not needed. lt m8063 8063fa
11 for more information www.linear.com/ltm8063 block diagram ltm8063 block diagram v out v in fb pg gnd run tr/ss sync rt 8063 bd current mode controller 0.2f 10pf 3.3nf 1.5h 249k lt m8063 8063fa
12 for more information www.linear.com/ltm8063 operation the ltm8063 is a stand-alone non-isolated step-down switching dc/dc power supply that can deliver up to 2.5a. the continuous current is determined by the internal operating temperature. it provides a precisely regulated output voltage programmable via one external resistor from 0.8v to 15v. the input voltage range is 3.2v to 40v. given that the ltm8063 is a step-down converter, make sure that the input voltage is high enough to support the desired output voltage and load current. a simplified block diagram is given above. the ltm8063 contains a current mode controller, power switching elements, power inductor and a modest amount of input and output capacitance. the ltm8063 is a fixed frequency pwm regulator. the switching frequency is set by simply connecting the appropriate resistor value from the rt pin to gnd. the run pin is used to place the ltm8063 in shutdown, disconnecting the output and reducing the input current to a few a. to enhance efficiency, the ltm8063 automatically switches to burst mode operation in light or no load situations. between bursts, all circuitry associated with controlling the output switch is shut down reducing the input supply current to just a few a. the oscillator reduces the ltm8063 s operating frequency when the voltage at the fb pin is low. this frequency fold - back helps to control the output current during start-up and overload. the tr/ss node acts as an auxiliar y input to the error amplifier . the voltage at fb servos to the tr/ss voltage until tr/ss goes above 0.77v. soft-start is implemented by generating a voltage ramp at the tr/ss pin using an external capacitor which is charged by an internal constant current. alternatively, driving the tr/ss pin with a signal source or resistive network provides a tracking function. do not drive the tr/ss pin with a low impedance volt - age source. see the applications information section for more details. the lt m8063 contains a power good comparator which trips when the fb pin is at about 90% to 110% of its regulated value. the pg output is an open-drain transistor that is off when the output is in regulation, allowing an external resistor to pull the pg pin high. the pg signal is valid when v in is above 3.2v. if v in is above 3.2v and run is low, pg will drive low. the ltm8063 is equipped with a thermal shutdown that inhibits power switching at high junction temperatures. the activation threshold of this function is above the maxi - mum temperature rating to avoid interfering with normal operation, so prolonged or repetitive operation under a condition in which the thermal shutdown activates may damage or impair the reliability of the device. lt m8063 8063fa
13 for more information www.linear.com/ltm8063 for most applications, the design process is straight- forward, summarized as follows: 1. look at table 1 and find the row that has the desired input range and output voltage. 2 . apply the recommended, c in , c out , r fb and r t values. 3. apply the c ff (from v out to f b ) as required. while these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. bear in mind that the maximum output current is limited by junction tempera - applications information ture, the relationship between the input and output voltage magnitude and polarity and other factors. please refer to the graphs in the typical performance characteristics section for guidance. the maximum frequency (and attendant r t value) at which the ltm8063 should be allowed to switch is given in table 1 in the maximum f sw column, while the recom - mended frequency (and r t value) for optimal efficiency over the given input condition is given in the f sw column. there are additional conditions that must be satisfied if the synchronization function is used. please refer to the synchronization section for details. table 1. recommended component values and configuration (t a = 25c) v in v out r fb (k) c in 2 c out c ff f sw r t (k) max f sw min r t (k) 3.2 to 40 0.77v open 1f 50v 0805 x5r 100f 4v 0805 x5r 27pf 600khz 73.2 600khz 73.2 3.2 to 40 1.0v 845 1f 50v 0805 x5r 100f 4v 0805 x5r 10pf 700khz 60.4 725khz 59 3.2 to 40 1.2v 453 1f 50v 0805 x5r 100f 4v 0805 x5r 800khz 52.3 850khz 48.7 3.2 to 40 1.5v 267 1f 50v 0805 x5r 100f 4v 0805 x5r 800khz 52.3 1mhz 41.2 3.2 to 40 1.8v 187 1f 50v 0805 x5r 100f 4v 0805 x5r 900khz 47.5 1.2mhz 33.2 3.3 to 40v 1 2.0v 154 1f 50v 0805 x5r 100f 4v 0805 x5r 1mhz 41.2 1.3mhz 29.4 3.8 to 40v 1 2.5v 113 1f 50v 0805 x5r 47f 4v 0805 x5r 1.2mhz 33.2 1.6mhz 23.7 5 to 40v 1 3.3v 75 1f 50v 0805 x5r 47f 4v 0805 x5r 1.2mhz 33.2 2mhz 18.2 6.5 to 40v 1 5v 45.3 1f 50v 0805 x5r 22f 6.3v 0805 x5r 1.4mhz 27.4 2.2mhz 15.8 10.5 to 40v 1 8v 26.7 1f 50v 0805 x5r 10f 10v 0805 x5r 1.8mhz 20.5 2.2mhz 15.8 18.5 to 40v 1 12v 17.4 1f 50v 0805 x5r 10f 16v 0805 x7s 1.8mhz 20.5 2.2mhz 15.8 22 to 40v 1 15v 13.7 1f 50v 0805 x5r 10f 25v 1206 x7r 2mhz 18.2 2.2mhz 15.8 3.2 to 36v 1 C3.3v 75 1f 50v 0805 x5r 47f 4v 0805 x5r 1.2mhz 33.2 2mhz 18.2 3.2 to 35v 1 C5v 45.3 1f 50v 0805 x5r 22f 6.3v 0805 x5r 1.4mhz 27.4 2.2mhz 15.8 3.2 to 32v 1 C8v 26.7 1f 50v 0805 x5r 10f 10v 0805 x5r 1.8mhz 20.5 2.2mhz 15.8 3.2 to 28v 1 C12v 17.4 1f 50v 0805 x5r 10f 16v 0805 x7s 1.8mhz 20.5 2.2mhz 15.8 3.2 to 25v 1 C15v 13.7 1f 50v 0805 x5r 10f 25v 1206 x7r 2mhz 18.2 2.2mhz 15.8 1. the ltm8063 may be capable of lower input voltages but may skip switching cycles. 2. an input bulk capacitor is required lt m8063 8063fa
14 for more information www.linear.com/ltm8063 applications information capacitor selection considerations the c in and c out capacitor values in table 1 are the minimum recommended values for the associated oper - ating conditions. applying capacitor values below those indicated in table 1 is not recommended and may result in undesirable operation. using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary. again, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. ceramic capacitors are small, robust and have very low esr. however, not all ceramic capacitors are suitable. x5r and x7r types are stable over temperature and ap - plied voltage and give dependable service. other types, including y5v and z5u have ver y large temperature and voltage coefficients of capacitance. in an application cir - cuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. ceramic capacitors are also piezoelectric. in burst mode operation, the ltm8063 s switching frequency depends on the load current, and can excite a ceramic capacitor at audio frequencies, generating audible noise. since the ltm8063 operates at a lower current limit during burst mode operation, the noise is typically very quiet to a casual ear. if this audible noise is unacceptable, use a high perfor - mance electrolytic capacitor at the output. it may also be a parallel combination of a ceramic capacitor and a low cost electrolytic capacitor . a final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the ltm8063. a ceramic input capacitor combined with trace or cable inductance forms a high-q (underdamped) tank circuit. if the ltm8063 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possi - bly exceeding the devices rating. this situation is easily avoided; see the hot-plugging safely section. frequency selection the ltm8063 uses a constant frequency pwm archi - tecture that can be programmed to switch from 200khz to 2.2mhz by using a resistor tied from the r t pin to ground. table 2 provides a list of r t resistor values and their resultant frequencies. table 2. sw frequency vs r t value f sw (mhz) r t (k) 0.2 232 0.3 150 0.4 110 0.5 88.7 0.6 73.2 0.7 60.4 0.8 52.3 1.0 41.2 1.2 33.2 1.4 27.4 1.6 23.7 1.8 20.5 2.0 18.2 2.2 15.8 operating frequency trade-offs it is recommended that the user apply the optimal r t value given in table 1 for the input and output operating condition. system level or other considerations, however, may necessitate another operating frequency. while the ltm8063 is flexible enough to accommodate a wide range of operating frequencies, a haphazardly chosen one may result in undesirable operation under certain operating or fault conditions. a frequency that is too high can reduce efficiency, generate excessive heat or even damage the ltm8063 if the output is overloaded or short-circuited. a frequency that is too low can result in a final design that has too much output ripple or too large of an output capacitor. maximum load the maximum practical continuous load that the ltm8063 can drive, while rated at 2a, actually depends upon both the internal current limit and the internal temperature. lt m8063 8063fa
15 for more information www.linear.com/ltm8063 applications information the internal current limit is designed to prevent damage to the ltm8063 in the case of overload or short-circuit. the internal temperature of the ltm8063 depends upon operating conditions such as the ambient temperature, the power delivered, and the heat sinking capability of the system. for example, if the ltm8063 is configured to regulate at 1.2v, it may continuously deliver 2.5a from 12v in if the ambient temperature is controlled to less than 55c. this is higher than the 2a continuous rating. please see the derating, v out = 1.2v curve in the typical per - formance characteristics section. similarly, if the output voltage is 15v and the ambient temperature is 100c , the ltm8063 will deliver less than 100ma from 36v in , which is less than the 2a continuous rating. load sharing the ltm8063 is not designed to load share. burst mode operation to enhance efficiency at light loads, the ltm8063 auto - matically switches to burst mode operation which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. during burst mode operation, the ltm8063 delivers single cycle bursts of current to the output capacitor followed by sleep periods where most of the internal circuitry is powered off and energy is delivered to the load by the output capacitor. during the sleep time, v in quiescent current is greatly reduced, so, as the load current decreases towards a no load condition, the percentage of time that the ltm8063 operates in sleep mode increases and the average input current is greatly reduced, resulting in higher light load efficiency. burst mode operation is enabled by tying sync to gnd. minimum input voltage the ltm8063 is a step-down converter, so a minimum amount of headroom is required to keep the output in regulation. keep the input above 3.2v to ensure proper operation. voltage transients or ripple valleys that cause the input to fall below 3.2v may turn off the ltm8063. output voltage tracking and soft-start the ltm8063 allows the user to adjust its output voltage ramp rate by means of the tr/ss pin. an internal 2a pulls up the tr/ss pin to about 2.4v. putting an external capaci - tor on tr/ss enables soft starting the output to reduce current surges on the input supply. during the soft-start ramp the output voltage will proportionally track the tr/ ss pin voltage. for output tracking applications, tr/ss can be externally driven by another voltage source. from 0v to 0.77v, the tr/ss voltage will override the internal 0.77v reference input to the error amplifier, thus regulat - ing the fb pin voltage to that of the tr/ss pin. when tr/ ss is above 0.77v , tracking is disabled and the feedback voltage will regulate to the internal reference voltage. the tr/ss pin may be left floating if the function is not needed. an active pull-down circuit is connected to the tr/ss pin which will discharge the external soft-start capacitor in the case of fault conditions and restart the ramp when the faults are cleared. fault conditions that clear the soft-start capacitor are the run pin transitioning low, v in voltage falling too low, or thermal shutdown. pre-biased output as discussed in the output voltage tracking and soft- start section, the ltm8063 regulates the output to the fb voltage determined by the tr/ss pin whenever tr/ ss is less than 0.77v. if the ltm8063 output is higher than the target output voltage, the ltm8063 will attempt to regulate the output to the target voltage by returning a small amount of energy back to the input supply. if there is nothing loading the input supply, its voltage may rise. take care that it does not rise so high that the input voltage exceeds the absolute maximum rating of the ltm8063. frequency foldback the ltm8063 is equipped with frequency foldback which acts to reduce the thermal and energy stress on the internal power elements during a short circuit or output overload condition. if the ltm8063 detects that the output has fallen out of regulation, the switching frequency is reduced as a function of how far the output is below the target voltage. this in turn limits the amount of energy that can lt m8063 8063fa
16 for more information www.linear.com/ltm8063 applications information be delivered to the load under fault. during the start-up time, frequency foldback is also active to limit the energy delivered to the potentially large output capacitance of the load. when a clock is applied to the sync pin, the sync pin is floated or held high, the frequency foldback is disabled, and the switching frequency will slow down only during overcurrent conditions. synchronization to select low ripple burst mode operation, tie the sync pin below about 0.4v (this can be ground or a logic low output). to synchronize the lt m8063 oscillator to an external frequency, connect a square wave (with about 20% to 80% duty cycle) to the sync pin. the square wave amplitude should have valleys that are below 0.4v and peaks above 1.5v . the ltm8063 will not enter burst mode operation at low output loads while synchronized to an external clock, but instead will pulse skip to maintain regulation. the ltm8063 may be synchronized over a 200khz to 2.2mhz range. the r t resistor should be chosen to set the switching frequency equal to or below the lowest synchronization input. for example, if the synchronization signal will be 500khz and higher, the r t should be selected for 500khz. for some applications it is desirable for the ltm8063 to operate in pulse-skipping mode, offering two major dif - ferences from burst mode operation. the first is that the clock stays awake at all times and all switching cycles are aligned to the clock. the second is that full switching frequency is reached at lower output load than in burst mode operation. these two differences come at the expense of increased quiescent current. t o enable pulse-skipping mode, the sync pin is floated. the ltm8063 features spread spectrum operation to further reduce emi/emc emissions. to enable spread spectrum operation, apply between 2.9v and 4.2v to the sync pin. in this mode, triangular frequency modulation is used to vary the switching frequency between the value programmed by r t to about 20% higher than that value. the modulation frequency is about 3khz . for example, when the ltm8063 is programmed to 2mhz, the frequency will vary from 2mhz to 2.4mhz at a 3khz rate. when spread spectrum operation is selected, burst mode operation is disabled, and the part will run in pulse-skipping mode. the ltm8063 does not operate in forced continuous mode regardless of sync signal. negative output the ltm8063 is capable of generating a negative output voltage by connecting its v out to system gnd and the ltm8063 gnd to the negative voltage rail. an example of this is shown in the typical applications section. the most versatile way to generate a negative output is to use a dedicated regulator that was designed to generate a negative voltage, but using a buck regulator like the ltm8063 to generate a negative voltage is a simple and cost effective solution, as long as certain restrictions are kept in mind. figure?1 shows a typical negative output voltage application. note that ltm8063 v out is tied to system gnd and input power is applied from v in to ltm8063 v out . as a result, the ltm8063 is not behaving as a true buck regulator, and the maximum output current depends upon the input voltage. in the example shown in the typical applications section, there is an attending graph that shows how much current the ltm8063 can deliver for given input voltages. figure?1. negative output voltage ltm8063 v out v in 8063 f01 gnd v in the ltm8063 can be used to generate a negative voltage note that this configuration requires that any load current transient will directly impress the transient voltage onto the ltm8063 gnd, as shown in figure? 2, so fast load transients can disrupt the ltm8063s operation or even cause damage. lt m8063 8063fa
17 for more information www.linear.com/ltm8063 applications information figure?2. fast load transient output transient response ltm8063 v out v in 8063 f02 gnd v in any output voltage transient appears on ltm8063 gnd the c in and c out capacitors in figure?3 form an ac divider at the negative output voltage node. if v in is hot-plugged or rises quickly, the resultant v out will be a positive tran - sient, which may be unhealthy for the application load. an anti-parallel schottky diode may be able to prevent this positive transient from damaging the load. the loca - tion of this schottky diode is important. for example, in a system where the ltm8063 is far away from the load, placing the schottky diode closest to the most sensitive load component may be the best design choice. carefully evaluate whether the negative buck configuration is suit - able for the application. figure?3. fast v in transient output experiences a positive transient ltm8063 v out v in 8063 f03 gnd c out c in optional schottky diode ac divider v in a schottky diode can limit the transient caused by a fast rising v in to safe levels shorted input protection care needs to be taken in systems where the output is held high when the input to the ltm8063 is absent. this may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode ored with the ltm8063s output. if the v in pin is allowed to float and the run pin is held high (either by a logic signal or because it is tied to v in ), then the ltm8063s internal circuitry pulls its quiescent current through its internal power switch. this is fine if your system can tolerate a few milliamps in this state. if you ground the run pin, the internal current drops to essentially zero. however, if the v in pin is grounded while the output is held high, parasitic diodes inside the ltm8063 can pull large currents from the output through the v in pin. figure?4 shows a circuit that runs only when the input voltage is present and that protects against a shorted or reversed input. figure?4. ltm8063 v in v in 8063 f04 run the input diode prevents a shorted input from discharging a backup battery tied to the output. it also protects the circuit from a reversed input. the ltm8063 runs only when the input is present pcb layout most of the headaches associated with pcb layout have been alleviated or even eliminated by the high level of integration of the ltm8063. the ltm8063 is neverthe - less a switching power supply, and care must be taken to minimize emi and ensure proper operation. even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. see figure 5 for a suggested layout. ensure that the grounding and heat sinking are acceptable. a few rules to keep in mind are: 1. place c ff , r fb and r t as close as possible to their respective pins. 2. place the c in capacitor as close as possible to the v in and gnd connection of the ltm8063. 3. place the c out capacitor as close as possible to the v out and gnd connection of the ltm8063. 4. place the c in and c out capacitors such that their ground currents flow directly adjacent to or underneath the ltm8063. lt m8063 8063fa
18 for more information www.linear.com/ltm8063 applications information 5. connect all of the gnd connections to as large a copper pour or plane area as possible on the top layer. avoid breaking the ground connection between the external components and the ltm8063. 6. use vias to connect the gnd copper area to the boards internal ground planes. liberally distribute these gnd vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. pay attention to the location and density of the thermal vias in figure 5. the ltm8063 can benefit from the heat-sinking afforded by vias that connect to internal gnd planes at these locations, due to their proximity to internal power handling components. the optimum number of thermal vias depends upon the printed circuit board design. for example, a board might use very small via holes. it should employ more thermal vias than a board that uses larger?holes. figure?5. c out v out fb sync gnd gnd gnd vin tr/ss rt gnd/thermal vias pg c in run 8063 f05 layout showing suggested external components, gnd plane and thermal vias hot-plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of ltm8063 . however, these capacitors can cause problems if the ltm8063 is plugged into a live supply (see linear technology application note 88 for a complete discussion). the low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the volt - age at the v in pin of the ltm8063 can ring to more than twice the nominal input voltage, possibly exceeding the ltm8063 s rating and damaging the part. if the input supply is poorly controlled or the ltm8063 is hot-plugged into an energized supply, the input network should be designed to prevent this overshoot. this can be accomplished by installing a small resistor in series to v in , but the most popular method of controlling input voltage overshoot is add an electrolytic bulk cap to the v in net. this capacitors relatively high equivalent series resistance damps the circuit and eliminates the voltage overshoot. the extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit, though it is likely to be the largest component in the circuit. thermal considerations the ltm8063 output current may need to be derated if it is required to operate in a high ambient temperature. the amount of current derating is dependent upon the input voltage, output power and ambient temperature. the derating curves given in the typical performance char - acteristics section can be used as a guide. these curves were generated by the ltm8063 mounted to a 58cm 2 4-layer fr4 printed circuit board. boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental operating conditions. for increased accuracy and fidelity to the actual applica - tion, many designers use fea (finite element analysis) to predict thermal performance. t o that end, page 2 of the data sheet typically gives four thermal coefficients: ja C thermal resistance from junction to ambient jcbottom C thermal resistance from junction to the bottom of the product case jctop C thermal resistance from junction to top of the product case jb C thermal resistance from junction to the printed circuit board. lt m8063 8063fa
19 for more information www.linear.com/ltm8063 applications information while the meaning of each of these coefficients may seem to be intuitive, jedec has defined each to avoid confusion and inconsistency. these definitions are given in jesd?51-12, and are quoted or paraphrased below: ja is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. this environment is sometimes referred to as still air although natural convection causes the air to move. this value is determined with the part mounted to a jesd 51-9 defined test board, which does not reflect an actual application or viable operating condition. jcbottom is the junction-to-board thermal resistance with all of the component power dissipation flowing through the bottom of the package. in the typical module regulator, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient envi - ronment. as a result, this thermal resistance value may be useful for comparing packages but the test conditions dont generally match the users application. jctop is determined with nearly all of the component power dissipation flowing through the top of the package. as the electrical connections of the typical module regulator are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junc - tion to the top of the part. as in the case of jcbottom , this value may be useful for comparing packages but the test conditions dont generally match the users application. jb is the junction-to-board thermal resistance where almost all of the heat flows through the bottom of the module regulator and into the board, and is really the sum of the jcbottom and the thermal resistance of the bottom of the part through the solder joints and through a portion of the board. the board temperature is measured a specified distance from the package, using a two sided, two layer board. this board is described in jesd 51-9. given these definitions, it should now be apparent that none of these thermal coefficients reflects an actual physical operating condition of a module regulator. thus, none of them can be individually used to accurately predict the thermal performance of the product. likewise, it would be inappropriate to attempt to use any one coefficient to correlate to the junction temperature vs load graphs given in the products data sheet. the only appropriate way to use the coefficients is when running a detailed thermal analysis, such as fea, which considers all of the thermal resistances simultaneously. a simplified graphical representation of these thermal resistances is given in figure?6. the blue resistances are contained within the module regulator, and the green are outside. the die temperature of the ltm8063 must be lower than the maximum rating, so care should be taken in the layout of the circuit to ensure good heat sinking of the ltm8063. the bulk of the heat flow out of the ltm8063 is through the bottom of the package and the pads into the printed circuit board. consequently a poor printed circuit board design can cause excessive heating, resulting in impaired performance or reliability. please refer to the pcb layout section for printed circuit board design suggestions. 8063 f06 module device junction-to-case (top) resistance junction-to-board resistance junction-to-ambient resistance (jesd 51-9 defined board) case (top)-to-ambient resistance board-to-ambient resistance junction-to-case (bottom) resistance junction ambient case (bottom)-to-board resistance figure?6. simplified graphical representation of the thermal resistance between the device junction and ambient lt m8063 8063fa
20 for more information www.linear.com/ltm8063 typical applications 1.2v out from 3.2v in to 40v in step-down converter 3.3v out from 5v in to 40v in step-down converter 1f x5r 0805 100f x5r 0805 453k 52.3k 800khz ltm8063 v out v out 1.2v 2.3a 2.5a peak v in v in 3.2v to 40v fb gnd run sync rt 8063 ta02 pins not used in this circuit: tr/ss, pg 1f x5r 0805 47f x5r 0805 75k 33.2k 1.2mhz ltm8063 v out v out 3.3v 2.1a 2.5a peak v in v in * 5v to 40v fb gnd run sync rt 8063 ta03 pins not used in this circuit: tr/ss, pg *v in may be as low as 3.6v with off-cycle skipping C5v out from 3.2v in to 35v in positive to negative converter maximum load current vs v in 1f x5r 0805 22f x5r 0805 45.3k 27.4k 1.4mhz 4.7f optional bulk cap + ltm8063 v out v out ?5v v in v in 3.2v to 35v fb gnd run sync rt 8063 ta04a pins not used in this circuit: tr/ss, pg lt m8063 8063fa 1.5 2.0 2.5 maximum load current (a) 8063 ta04b input voltage (v) 0 10 20 30 40 0.5 1.0
21 for more information www.linear.com/ltm8063 package description package photo table 3. ltm8063 pinout (sorted by pin number) pin pin name pin pin name pin pin name pin pin name pin pin name pin pin name pin pin name a 1 gnd b 1 pg c 1 rt d 1 gnd e 1 gnd f 1 v out g 1 v out a 2 fb b 2 sync c 2 gnd d 2 gnd e 2 gnd f 2 v out g 2 v out a 3 tr/ss b 3 run c 3 gnd d 3 gnd e 3 gnd f 3 v out g 3 v out a 4 gnd b 4 v in c 4 v in d 4 gnd e 4 gnd f 4 v out g 4 v out lt m8063 8063fa
22 for more information www.linear.com/ltm8063 package description please refer to http://www.linear.com/product/ltm8063#packaging for the most recent package drawings. notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters ball designation per jep95 4 3 details of pin #1 identifier are optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or marked feature package top view pin ?a1? corner x y package bottom view 3 see notes suggested pcb layout top view detail a pin 1 0.000 1.2 0.4 0.4 1.2 2.4 1.6 0.8 0.8 1.6 2.4 0.000 detail a ?b (28 places) f g e a b c d 1 3 2 4 d a detail b package side view m x yzddd m zeee 0.40 0.025 ? 28x e b e e b a2 f g bga package 28-lead (6.25mm 4mm 2.22mm) (reference ltc dwg # 05-08-1517 rev a) 6 see notes 4 aaa z 2 aaa z 2 bga 28 0517 rev a tray pin 1 bevel package in tray loading orientation component pin ?a1? ltmxxxxxx module symbol a a1 a2 b b1 d e e f g h1 h2 aaa bbb ccc ddd eee min 2.02 0.30 1.72 0.45 0.37 0.27 1.45 nom 2.22 0.40 1.82 0.50 0.40 6.25 4.00 0.80 4.80 2.40 0.32 1.50 max 2.42 0.50 1.92 0.55 0.43 0.37 1.55 0.15 0.10 0.20 0.15 0.08 total number of balls: 28 dimensions notes ball ht ball dimension pad dimension substrate thk mold cap ht z detail b substrate a1 ccc z z // bbb z h2 h1 b1 mold cap 5. primary datum -z- is seating plane 6 package row and column labeling may vary among module products. review each package layout carefully ! lt m8063 8063fa
23 for more information www.linear.com/ltm8063 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 02/18 initial cap sentence (e.g.: update to curve g04 in the typical performance characteristics section). 4, 5 b 02/18 changed i out from 2.5a to 2a for output voltage ripple test added v in = 8v to switching frequency consideration changed 2.5a to 2a in first paragraph corrected pin name of pin b2 from fb to pg 3 3 15 18 lt m8063 8063fa
24 for more information www.linear.com/ltm8063 ? linear technology corporation 2017 lt 0218 ? printed in usa www.linear.com/ltm8063 related parts typical application part number description comments ltm8053 40v, 3.5a step-down module regulator 3.4v v in 40v. 0.97v v out 15v. 6.25mm x 9mm x 3.32mm bga package. ltm8032 36v, 2a low emi step-down module regulator 3.6v v in 36v, 0.8v v out 10v. en55022b compliant. ltm8033 36v, 3a low emi step-down module regulator 3.6v v in 36v. 0.8v v out 24v. en55022b compliant. ltm8026 36v, 5a cvcc step-down module regulator 6v v in 36v. 1.2v v out 24v. constant voltage constant current operation. LTM4613 36v, 8a low emi step-down module regulator 5v v in 36v. 3.3v v out 15v. en55022b compliant. ltm8027 60v, 4a step-down module regulator 4.5v v in 60v, 2.5v v out 24v. ltm8050 58v, 2a step-down module regulator 3.6v v in 58v, 0.8v v out 24v. ltm8003 3.5a version of ltm8002, 40v, 3.5a, i q = 25a fmea compliant 3.4v v in 40v, 0.97v v out 18v, 6.25mm 9mm 3.32 bga package. ltm8065 40v, 2.5a silent?switcher step-down module regulator 3.4v v in 40v, 0.97v v out 18v, 6.25mm 6.25mm 2.32mm bga package. design resources subject description module design and manufacturing resources design: ? selector guides ? demo boards and gerber files ? free simulation tools manufacturing: ? quick start guide ? pcb design, assembly and manufacturing guidelines ? package and board level reliability module regulator products search 1. sort table of products by parameters and download the result as a spread sheet. 2. search using the quick power search parametric table. techclip videos quick videos detailing how to bench test electrical and thermal performance of module products. digital power system management linear technologys family of digital power supply management ics are highly integrated solutions that offer essential functions, including power supply monitoring, supervision, margining and sequencing, and feature eeprom for storing user configurations and fault logging. 12v out from 18.5v in to 40v in step down converter 1f x5r 0805 10f x7s 0805 17.4k 20.5k 1.8mhz ltm8063 v out v out 12v 0.5a 2.2a peak v in v in * 18.5v to 40v fb gnd run sync rt 8063 ta05 pins not used in this circuit: tr/ss, pg *v in may be as low as 12.6v with off-cycle skipping lt m8063 8063fa

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